Figure 6.24: Microscope image of two AZ-P4620 patterns with different exposure times:

(a) 75 seconds, and (b) 58.4 seconds. The black bond around the pattern indicates the angled sidewalls.

Step 6: Through etching of 200 um silicon was performed using the Al2O3 layer as a mask, in the Oxford Plasmalab 100 ICP380 system, using the Bosch process. Al2O3 is a chemically inert material and gives appropriate selectivity.

The fabricated shadow mask is shown in Fig. 6.18. Rough alignment under the optical microscope led to a misalignment of around 100 µm. The alignment precision can be improved to 5-10µmby using a shadow-mask aligner equipped with a three-axis micropo-sitioner and 1 rotation axis and 2 tilt axes. At the time of measurement, this system was not available.

Figure 6.25: Profile pattern of 11 µm AZ P4620 photoresist (a) before and (b) after post bake at 110◦C for 5 minutes. Insets are corresponding microscope images.

process: soft masks made of thick layers of the positive photo resist AZ P4620, and hard masks made of Al2O3 and Al.

The selectivity of the hard masks is very high [141]. Any reactions Al2O3 and Al have with the etchant gas SF6 are too small to perceive; attempts to measure any changes in the thickness of hard masks before and after etching with filmetrics and profilometer were unsuccessful. However, based on the experiments done, it is possible to say the selectivity is greater than 1000 and 5000 for aluminum and aluminum oxide, respectively.

Using a hard mask required additional deposition and lift-off steps, as depicted in Fig.

6.20. The hard mask was fabricated by coating the sample with 950 nm of negative photo resist ma-N 1410 followed by patterning the photo resist via optical lithography. Then,

Figure 6.26: SEM image of silicon waveguide etched by (a) standard Busch process with a patterned AZ-P4620 mask, and (b) Busch process with longer passivation time step, with the same AZ-P4620 mask, postbaked at 110◦ for 5 minutes.

100 nm Al2O3 or Al were deposited by electron beam evaporation. The lift-off process was accomplished in PG remover heated to 80◦C (see Fig. 6.20). A very clean lift-off is required, as any small flakes of material remaining after the lift-off lead to rippling along the edge of the etched waveguide.

The patterned photo resist layer can also be used as an etch mask. For this purpose, the thick photo resist AZ P4620 was used. Figure 6.21 illustrates the fabrication steps.

The details of each step are explained below. The surface preparation before coating is an essential step for proper adhesion. Weak resist adhesion could result in the resist pattern peeling off after development, or unwanted lateral etching through the gap under the resist (Fig. 6.22). Surface moisture is a major factor that degrades resist adhesion. Therefore, surface preparation consists of dehydration through baking to remove surface moisture then the addition of an adhesion-promoter, hexamethyl disilizane (HMDS). The substrate dehydration and vapor deposition of HMDS were performed in a YES HMDS prime oven.

The selectivity of the photo resist is around 20 to 30. Therefore, the etching of 300

Figure 6.27: (a) Sample before etching mounted on aluminum-oxide-coated wafer. (b) Fabricated sample.

um silicon requires a photo resist thicker than 15 um. For this resist, the maximum thickness of the single coat is around 17 µm, and the required thickness can be achieved by a single-coating. However, the solvent content of the resist is vaporized more rapidly and more efficiently by successive spinning and baking processes. Therefore, a thick resist of around 24µm was achieved by spinning the photo resist, then baking it on a hot plate, then repeating the spin-bake cycle. For both spinning processes, the photoresist was first spread at a speed of 500 RPM for 10 seconds, followed by a spin at a speed of 2000 RPM for 25 seconds. Different durations and temperatures were tested for the two baking processes.

AZ P4620 is a DNQ-novolac photo resist, consisting of novolac resin, an organic sol-vent, and diazonaphtoquinone (DNQ) photoactive compounds. The excess solvent should be removed by softbaking after the photo resist coating. If the softbake is short and/or the temperatures are too low, the dork erosion will increase, and the high remaining solvent concentration may cause bubbles during exposure or dry etching (see Fig. 6.23). The solvent will out gas and the resist layer will be filled with micro cavities (see Fig. 6.23(a)).

On the other hand, high temperatures or long baking times will thermally decompose a significant amount of the photo active compound, lowering the development rate

signifi-Figure 6.28: Measurement setup.

cantly [].

The best result was achieved with a soft bake temperature and time of 110◦ and 80 seconds for the first layer and 115◦ and 10 minutes for the second layer. Lower temperatures resulted in bubbling, and higher temperatures resulted in very difficult or even impossible development.

A certain water content in the DNQ-based resist is required during exposure to attain a high development rate []. Softbaking, however, makes the resist film almost water-free.

Thus, the required water is gradually drawn from the air into the resist film. Therefore, a delay between baking and exposure is necessary for rehydration of the photoresist film.

This time depends on the photoresist’s thickness, air temperature and humidity.

After more than 3 hours rehydration time, the photoresist was exposed to a UV light wavelength of 405 nm with an intensity of 25 mW/cm2 for 58.4 seconds. Exposure time was adjusted to achieve steep resist sidewalls. Exposure doses that are too high cause undesired exposure by scattering, diffraction and reflection. As a result, too much of the resist is dissolved during development. On the other hand, the resist is not developed successfully

Figure 6.29: Simulated S-parameters of silicon image waveguide with length of lsi = 20 mm, width of wsi = 125µm, thickness of hsi = 300µm and taper length of ltaper = 5.5mm, with and without attached supporting block.

with a low-exposure dose. Figure 6.24 shows microscope images of the developed two-layer patterned photoresists with different exposure times of 75 seconds and 58.4 seconds. As can be seen, the shorter exposure time results in straighter sidewalls.

As discussed above, achieving straight vertical walls with thick photo resist is difficult.

Another method is to create a thinner photoresist layer, but to also improve the selectivity of the mask by hardening the photoresist with post baking after development. A post-development bake (or ”hard bake”) of the photoresist pattern is a common method for stabilizing a printed pattern so that it will withstand the harsh environments of etching.

This final bake step removes residual solvent, water, and gasses and improves adhesion of the photoresist to the substrate and its resistance to RIE etches. Post baking increased the selectivity of the photo resist to around 100.

The photoresist was spun to a thickness of approximately 11 um, then cooked at 110 for 90 seconds. After more than 3 hours delay for rehydration, the coated photo resist was exposed to UV light for 29.2 seconds and developed in 4:1 diluted AZ 400 for 2:40 minutes.

Then, it was baked for 5 minutes on a hot plate at 110◦C. Figure 6.25 shows both profiles (measured by the Bruker profilometer) and microscope images of the developed patterned photoresists before and after the post bake (inset). As depicted in this figure, the profile pattern is a little distorted due to thermal reflow.

The ultimate purpose of the hard bake is full removal of the solvent. However, since the

Figure 6.30: Measured S-parameters of fabricated silicon waveguide with no grating and graphene layer.

diffusion rate of the solvent is extremely low in solid photoresist, in order to achieve full removal for a thick photo resist the photoresist is baked at temperatures higher than the glass transition temperature of the resin. The resist is thus transformed from a glassy state into a soft rubbery state and starts flowing. In this semi-liquid state, the diffusion rate is significantly improved. Therefore, hard baking is usually done at or slightly above the glass transition temperature, so the flow of the resist degrades the resist profile significantly.

Thermal deformation of positive photoresist patterns during high temperature treat-ments is significantly reduced by deep UV curing of the resist surface to form a hard outer shell. In this method, the outer layer of the photoresist image is exposed to UV radiation in the range of 200-320 nm. The novolak resin in the photoresist is highly absorptive at this wavelength band. Therefore, the short wavelength UV lights penetrate only about 100 nm into the resist film. The thin cured layer allows hard baking of the photo resist at temperatures up to 200◦C without any deformation. After deep UV curing, strippers cannot remove the resist and O2 plasma etching is required to completely remove it.

Figure 6.31: DC bias circuit.

The novolak-based AZ P4620 resist has a glass transition temperature of around 125◦C.

Since there was no access for this thesis to a deep-UV cure system, temperatures smaller than the glass- transition temperature were tested for hard baking. A 110◦C and 5 min bake resulted in only a small distortion of the pattern profile and sidewalls, and the photoresist was hardened enough to withstand etching of 300µm silicon.

It is better to shorten the delay between hard baking and etching so as to prevent rehydration of the resist. As mentioned in the beginning of the chapter, the Bosch process on an ICP-RIE system was used to fabricate rectangular dielectric waveguides. The etch rate depends on the amount of exposed silicon area on the wafer. A larger exposed area leads to a lower etch rate. Therefore, the samples were mounted on aluminium-oxide-coated wafers before being put inside the ICP-RIE system (for etching)(Fig. 6.27(a)).

The Bosch recipe parameters were modified to 90◦ sidewalls. Figure 6.26(a) shows an SEM image of the etched waveguide cross section etched by the standard Bosch silicon etching process in Oxford Plasmalab System 100 ICP380 DRIE at a temperature of T=0◦C.

As can be seen, the sidewall angle is less than 90◦ and the etch rate in the horizontal direction is not zero. Therefore, the passivation step time was increased from 5 seconds to 7 seconds while keeping all other parameters unchanged. Figure 6.26(b) shows a SEM image of the etched waveguide cross section fabricated by the above mentioned modification which resulted in perfectly vertical sidewalls. For both figures 6.26 (a) and (b), the one-layer AZ-P4620 masks were fabricated with the same recipe except that for Fig. 6.26(b) the mask was hard-baked after the development.

A resist strip is the final operation after the etching process is completed. The etched silicon waveguides were dipped in heated PG remover for one hour. If that did not remove the resist layer, it was etched using two minutes of oxygen plasma ashing at 180 degrees.

Figure 6.27(b) shows the image of the fabricated sample. The next step is to connect the biasing voltage and conduct measurements.

140 145 150 155 160 165 170 f (GHz)

-25 -20 -15 -10 -5 0

S 11 and S 21 (dB)

S11: no pcb board S21: no pcb board S11: V

GS=0 , V DS=0 S21: VGS=0 , VDS=0 S11: V

GS=3V , V DS=30V S21: V

GS=3V , V DS=30V

Figure 6.32: Measured S-parameters of fabricated graphene TWA over the frequency range of 140-170 GHz.